In 1971, the Intel 4004 microprocessor contained 2,300 transistors. In 2024, NVIDIA's Blackwell GPU contains 208 billion transistors. That roughly 90 million-fold increase is often associated with a name: Moore's Law, the observation that the number of transistors on a chip doubles roughly every two years.

Despite the name of the law, this is just an experimental observation, and since around 2010 the doubling rate has slowed down.

Gordon E. Moore in 2004. In 1965, while still director of research at Fairchild Semiconductor, he wrote the paper that laid the foundation for "Moore's law"

From a 1965 article

In 1965, Electronics magazine invited Gordon Moore, then in charge of research at Fairchild Semiconductor, to predict the semiconductor industry for the next 10 years. The article Cramming more components onto integrated circuits noted that the number of components on an integrated circuit, at the lowest cost, was roughly doubling each year, and he extrapolated that by 1975 a chip could contain 65,000 components.

In 1975, at the IEEE International Electron Devices Meeting conference, Moore adjusted his forecast: after about 1980, the growth rate would slow to a doubling every two years. The oft-quoted 18-month figure actually comes from David House, an Intel executive, when he estimated chip performance would double every 18 months.

Circuit layout drawing of the Intel 4004 (1971), a chip containing 2,300 transistors on an area of ​​12 mm², taken at the Vintage Computer Festival Berlin

According to Britannica, from the late 1940s to the early 2010s, the typical transistor has shrunk from millimeters to several tens of nanometers, more than 100,000 times.

Signs of slowing down

Along with Moore's Law is Dennard scaling: the smaller the transistor, the power density is almost constant, so the new chip runs faster without getting hotter. This effect ended in the mid-2000s because of leakage current, causing the industry to shift to many-core chips.

• Single core performance: according to data from John Hennessy and David Patterson, increased 52% per year in the period 1986-2003, 23% per year in the period 2003-2011 and only about 7% per year in the period 2011-2018.
• 2015: Intel CEO Brian Krzanich at the time said the company's pace was "closer to two and a half years than two years".
• September 2022: NVIDIA CEO Jensen Huang said that Moore's law is dead, a few days later Intel CEO Pat Gelsinger affirmed the opposite.
• Late 2023: Gelsinger himself admitted that the number of transistors now only doubles "almost every three years".

Illustrative diagram: number of transistors on a chip on a logarithmic scale, compared to the doubling every 2 years curve from the Intel 4004

Where are the physical limits

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When the transistor is as small as a few nanometers, it is difficult for the control gate to completely block the current flow. Wikipedia sums up three main barriers: leakage current between source and drain, limited gate metal, and limited choice of channel material.

The semiconductor industry responded by changing the shape of the transistor. In 2012, Intel introduced 3D fin-shaped FinFET transistors into the 22 nm process, with the gate embracing the channel from three sides. The next step is the gate surround transistor (GAA), in which the gate encloses stacked thin channel plates. Note that process names like "2 nm" no longer correspond to the actual size of the transistor.

As early as 2005, Moore said this prediction could not last forever: "The nature of the exponential function is that you keep pushing it, and eventually disaster happens." He also believes that transistors are approaching atomic size, a fundamental barrier. The limit also lies in money: according to "Moore's second law" (Rock's law), the cost of building a semiconductor factory also increases exponentially, while the price of key equipment such as EUV photolithography machines doubles about every 4 years.

Situation as of October 2026

• TSMC N2: the first 2 nm process using TSMC's nanosheet transistors, starting mass production in the fourth quarter of 2025 in Hsinchu and Kaohsiung. TSMC schedules production of the N2P and A16 (with rear power supply line) in the second half of 2026, A14 in 2028.
• Intel 18A: combines GAA RibbonFET transistor and PowerVia back panel power supply. The Panther Lake chip (Core Ultra Series 3) is the first product, shipping initial units in late 2025 and widely available from January 2026.
• NVIDIA Blackwell: 208 billion transistors on TSMC 4NP process, but includes two dies, each die is as big as the maximum limit of the printing mold, connected together by a 10 TB/s transmission line.

A printed circuit silicon wafer. Each square is a chip, which is later cut apart and packaged

Blackwell shows how the industry is moving forward: when it is not possible to print a larger die, firms combine multiple dies in a single chip package. Since 2016, the ITRS international semiconductor roadmap is no longer centered on Moore's Law but has shifted to "More than Moore", letting application needs lead chip design.

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Therefore, the answer depends on interpretation. If it's about miniaturizing transistors so prices fall steadily every two years, that pace has slowed significantly since around 2010. If the number of transistors on a chip is still increasing exponentially, that trend continues, just in more expensive ways.

Source:

Wikipedia

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Britannica

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Computer History Museum

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TSMC

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Intel

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Reuters

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NVIDIA